Basic overview
Parity refers to the nature of even or odd or even a number. Parity is usually used in data communication to ensure the validity of data. Each device must decide whether it will be used for even parity, odd parity, or non-parity. The sending device adds 1s to each string it sends or decides whether this number is even or odd. Then, it adds an extra bit, called the check digit, to this string. If even parity is in use, the parity bit will make these positions even; if odd parity is in use, the parity bit will make these positions odd.
The parity bit is a binary number that indicates whether the number of 1s in the binary number of a given location number is odd or even. The parity bit is the simplest error detection code.
There are two types of parity bits: even parity bits and odd parity bits. If the number of 1s in a given set of data bits is odd, then the even parity bit is set to 1, so that the total number of 1s is even. If the number of 1s in a given set of data bits is even, then the odd parity bit is set to 1, making the total number of 1s odd. Even check is actually a special case of cyclic redundancy check. A 1-bit CRC is obtained through the polynomial x + 1.
Error detection
If an odd number of data bits including the parity bit changes during the transmission, the parity bit will be wrong, indicating that an error occurred during the transmission. Therefore, the parity bit is an error detection code, but since there is no way to determine which bit is in error, it cannot perform error correction. If an error occurs, all data must be thrown away, and then the data will be transferred from the beginning. It may take a long time to successfully transmit data on a noisy medium, or even impossible at all. But the parity bit also has its advantages. It is the best check code that can be achieved with one bit of data, and it only needs some XOR gates to generate it. See the description of other error correction codes in Hamming codes.
Use
Because it is very simple, the parity bit is used in many computer hardware to be able to re-operate when trouble is encountered or through simple error detection can be very useful The occasion of the role. For example, the SCSI bus uses parity bits to detect transmission errors, and many microprocessor instruction caches also include parity bit protection. Because the instruction cache data is a copy of the main memory data, when an error is found, the wrong data can be discarded and the data can be retrieved again.
In serial data communication, the commonly used format is 7 data bits, 1 parity bit, and 1 to 2 stop bits. This format cleverly adapts to all 7-bit ASCII characters with convenient 8-bit bytes. It can also be expressed in other formats. 8-bit data plus 1 parity bit can transmit any 8-bit byte data.
In serial communication, the parity bit is usually generated and verified by interface hardware such as UART. On the receiving side, the status bit of the register in the interface hardware is transmitted to the CPU and the operating system. . The recovery of erroneous data is usually by resending the data. This process is usually handled by software such as operating system input and output programs.
Memory check
For the parity check of the memory, we must start with the concept of bits. Bit is the smallest unit in memory, also called "bit". It has only two These states are represented by 1 and 0 respectively. We call 8 consecutive bits a byte. Each byte of non-parity memory has only 8 bits. If one of its bits stores an incorrect value, the corresponding data stored in it will change and cause application errors. In the parity check memory, an extra bit is added for error detection in addition to each byte (8 bits). For example, a certain value (1, 0, 0, 1, 1, 1, 1, 0) is stored in a byte, add up each bit (1+0+0+1+1+1+1) +0=5). If the result is odd, the parity bit is defined as 1, otherwise it is 0. When the CPU returns to read the stored data, it will add the data stored in the first 8 bits again to see if the calculation result is consistent with the check bit. When the CPU finds that the two are different, it will make a certain response. The motherboard can use two types of memory modules with or without parity, but it should be noted that the two cannot be mixed.
The above description describes how the parity check works in a computer. It should be noted that the peripheral devices connected to the bus and the I/O bus controller use an odd parity error checking method. Parity check is not a reliable method of error checking, because it may cause errors in both "bits" during transmission. For transmission within a personal computer, this possibility is considered minimal. In some mainframe systems, data integrity is very important, and three "bits" are allocated for parity.
Parity is also used for communication between modems. Here, the parity can be selected to be even (a continuous transmission will form an even) or odd. The user can also choose to have no parity, which means that the modem has no transmission or parity bits. When no parity can be selected (or the default), it is assumed to have other forms of verification to detect any errors in the transmission process. The absence of parity usually means that the parity bit can be used for data and transmission acceleration. In cat-to-cat communication, the type of parity is adjusted by the sending and receiving modem before the transmission occurs.
Parity block
Some redundant disk arrays (en: RAID) use parity blocks to achieve redundancy. If a disk in the array fails, the data block in the working disk and the parity block are used to reconstruct the lost data.
Each column below represents a disk, assuming A1 = 00000111, A2 = 00000101, and A3 = 00000000. The Ap obtained by XOR of A1, A2, and A3 is equal to 00000010. If the second disk fails, A2 will not be accessible, but it can be rebuilt by the exclusive OR of A1, A3 and Ap:
A1 XOR A3 XOR Ap = 00000101
Redundancy Additional disk array
A1 A2 A3
Ap B1 B2
Bp C1 C2
C3 C4 Cp
Note: The data block is format A#, and the parity block is Ap.