Computer logic design

Book Introduction

This book mainly introduces the basic theories and methods of computer logic analysis and design, including switch theory foundation, logic devices, analysis and design methods of combinational logic, and analysis of sequential logic And design methods. The function of the specific chip is downplayed, and the role of the logic design for the hardware configuration is strengthened. And through the introduction to the EDA environment and language, it makes it convenient for readers to carry out practical operations on computer logic design. The book is divided into 9 chapters, including: switch theory foundation, logic circuit devices, logic function optimization, combinational logic analysis and design, sequential logic components, sequential logic analysis and design, comprehensive logic design, logic design VHDL language , Logic design environment and examples.

This book combines the author's many years of teaching and practical experience, draws on the essence of relevant masterpieces and materials at home and abroad, with clear goals, highlighting key points, and a close connection with related courses in computer science. Contains a large number of examples and exercises, suitable for readers to learn while practicing. This book can be used as a textbook for courses such as computer logic foundations (formerly digital circuits) for undergraduates and related majors. It is also suitable for undergraduates and postgraduates to study computer logic design methods as a reference book.

Table of Contents

Chapter 1 Basics of Switch Theory 1

1.1 Overview of Hardware Technology 1

1.2 Number System and Coding 4

1.2.1 Base and Binary 4

1.2.2 Mutual conversion of values ​​between bases 5

1.2.3 Two-decimal code 8

1.2.5 Other coding 12

1.3 Switch logic theory 13

1.3.1 Basic logic operation 14

1.3. p>

1.3.2 Compound logic operations 18

1.3.3 Basic laws and rules 21

1.3.4 Standard forms of logic functions 25

1.3.5 Equivalent Conversion of Logic Function 32

1.4 Summary 33

Exercises 34

Chapter 2 Logic Circuit Components 36

2.1 Transistor switching principle 36

2.2 NMOS logic gate 41

2.3 CMOS logic gate 43

2.4 The nature of transistor logic circuit 46

2.4.1 Equivalent resistance of logic circuit 46

2.4.2 Transmission characteristics of logic circuit 46

2.4.3 Dynamic nature of logic circuit 48

2.4.4 Power consumption properties of logic circuits 49

2.4.5 Load characteristics of logic circuits 50

2.5 Buffers, transmission gates and tri-state gates 52

2.6 Positive logic and negative logic 54

2.7 7400 series standard chip 55

2.8 Programmable logic device 57

2.8.1 Programmable logic array (PLA ) 57

2.8.2 Programmable Array Logic (PAL) 59

2.8.3 Array Programming 61

2.8.4 Complex Programmable Logic Device ( CPLD) 62

2.8.5 Implementation of Programmable Logic Device (PLD) 64

2.8.6 Field Programmable Gate Array (FPGA) 68

2.8 .7 Implementation of Field Programmable Gate Array (FPGA) 71

2.9 Custom Chips, Standard Cells and Gate Arrays 73

2.10 Summary 75

Exercise 76< /p>

Chapter 3 Optimization of Logical Functions 79

3.1 Simplification of Formula 79

3.2 Simplification of Karnaugh Map 81

3.2. 1 Kano The composition of graph 81

3.2.2 Karnaugh map represents the logical function 82

3.2.3 The smallest item merged on the Karnaugh map 83

3.2.4 Card Connaught map simplified logic function 84

3.2.5 Karnaugh map method and formula method 89

3.2.6 Incompletely determined logic function and its simplification 90

3.2.7 Simplification of multi-output logic functions 92

3.3 Simplification of list method 93

3.4 Summary 98

Exercises 99

Chapter 4 Analysis and Design of Combination Logic 101

4.1 Analysis of Small Combination Logic 101

4.2 Design of Small Combination Logic 103

4.3 Logic Operational element 109

4.3.1 Multiplexer 109

4.3.2 Encoder 116

4.3.3 Decoder 117

4.4 Arithmetic operation element 123

4.4.1 Adder 123

4.4.2 Adder/subtractor 130

4.4.3 Comparator 132

4.4.4 Multiplier 135

4.5 Analysis and design of medium-sized combinatorial logic 140

4.6 Summary 147

Exercises 148

Chapter 5 Sequential logic element 152

5.1 Bistable memory cell 153

5.2 Latch 155

5.2.1 Basic RS latch 155

5.2.2 Gated RS latch 157

5.2.3 Gated D latch 159

5.3 Trigger 160

5.3.1 Master-slave D trigger 160

5.3.2 Master-slave RS trigger 162

5.3.3 Edge-triggered D flip-flop 163

5.3.4 D flip-flop 164 with clear and set signals

5.3.5 T flip-flop 167

5.3.6 JK flip-flop 168

5.4 Register 169

5.4.1 Shift register 169

5.4.2 Bidirectional shift register 171

5.5 Counter 173

5.5.1 Asynchronous counter 173

5.5.2 Synchronous counter 175

5.5.3 Parallel counting counter 178

5.6 Register type counter 182

5.6.1 Ring counter 182

5.6.2 Twisted ring counter 183< /p>

5.7 Summary 184

Exercises 185

Chapter 6 Analysis and Design of Sequential Logic 188

6.1 Analysis of Synchronous Sequential Logic 188

6.1.1 Small-scale synchronous sequential logic analysis example 189

6.1.2 Medium-sized synchronous sequential logic analysis 197

6.2 Function transformation of sequential logic element 200

6.3 Design of synchronous sequential logic 204

6.3.1 Small-scale synchronous sequential logic design example 204

6.3.2 Design of serial adder 216

6.3.3 Counter design 220

6.3.4 Medium-sized synchronous sequential logic design 229

6.3.5 State reduction 235

6.4 Asynchronous sequential logic design Analysis 242

6.5 Summary 245

Exercises 246

Chapter 7 Comprehensive Logic Design 254

7.1 Algorithm State Machine 254

7.2 Design of arithmetic logic unit structure 261

7.3 Design of bus structure 265

7.4 Design of storage components 272

7.5 Summary 277

Exercises 278

Chapter 8 VHDL Language 281 for Logical Design

8.1 Basic knowledge for getting started with VHDL 281

8.2 Naming rules and Remark 282

8.3 Objects and their descriptions, operations and assignments 282

8.3.1 Signals, variables and constants 282

8.3.2 Data types 283

8.3.3 Description of signals, variables and constants 284

8.3.4 Common operators 285

8.3.5 Assignment statements 287

8.4 Use of if statement, case statement and process statement 287

8.4.1 if statement 288

8.4.2 process statement 290

8.4.3 case statement 295

8.5 design entity 298

8.5.1 entity (entity) 298

8.5.2 structure (architecture) 300

8.6 Hierarchical structure design 304

8.6.1 Component statement and port map statement 305

8.6.2 Design an AND-OR gate 306 with a hierarchical structure design method

8.7 Design of a general register bank 309

8.7.1 Design requirements 309

8.7.2 Design scheme 309

8.7. 3 Design and Implementation 309

8.8 Some suggestions for designing hardware with VHDL language 313

8.9 Summary 314

Exercises 315

No. 9 Chapter Logic Design Environment and Examples 329

9.1 Design examples implemented with schematic diagrams in Quartus II 9.0 329

9.1.1 Basic gate design 329

9.1 .2 Adder design 336

9.2 Design example of using VHDL language in Quartus II 9.0 338

9.2.1 Design of encoder 338

9.2. 2 Design of decoder 339

9.2.3 Design of register 340

9.2.4 Design of counter 342

9.2.5 Design of frequency divider 343

9.3 Comprehensive design example of digital system in Quartus II 9.0 345

9.3.1 Scanning digital tube display 345

9.3.2 Traffic light controller 348

9.4 Summary 352